2005

• Alexander Mora-Sanchez, Wolfgang H. Krautschneider
  A Low-Power Small-Area 1-bit Full Adder Cell in a 0.35μm CMOS Technology for Biomedical-Oriented System-on-Chip Applications
  In Tagungsband "ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 554-558
  Veldhoven (The Netherlands)
  Abstract:
  In this paper a low-power small-area 1-bit CMOSbased adder cell is being introduced. It needs only 14 transistors and relies on low-power XOR/XNOR cells, transmission function logic and pass-gate logic cells to compute the sum and carry-out bits with rail-to-rail output swing. The proposed adder cell, which has been designed and laid out according to the layout requirements of a 0.35 μm 3.30 V CMOS technology, consumes 45% less power and occupies 47% less area than the 28-transistor standard cell provided by the technology supplier, making it attractive for being used in low-power applications, such as in a biomedical-oriented system-on-chip design.
  BibTeX:
  @inproceedings{Mora:fulladder:2005,
  author = {Alexander Mora-Sanchez and Wolfgang H. Krautschneider},
  title = {{A} {L}ow-{P}ower {S}mall-{A}rea 1-bit {F}ull {A}dder {C}ell in a 0.35{&}#956;m {C}{M}{O}{S} {T}echnology for {B}iomedical-{O}riented {S}ystem-on-{C}hip {A}pplications},
  year = {2005},
  month = {11},
  booktitle = {ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {Veldhoven (The Netherlands)},
  pages = {554-558} }
  [Abstract] [BibTeX]
  
  
• Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfgang H. Krautschneider
  Application of multi-objective optimization with a genetic algorithm for the optimization of CML Circuits
  In Tagungsband "ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 263-267
  ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005
  Abstract:
  This paper introduces the Pareto front as a useful analysis tool to explore the design space of MOS Current Mode Logic (MCML) circuits. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal parameterizations and their corresponding values in an aggregate fitness space. As an example of the flexibility of this design automation approach, the results for an optimized fundamental inverter logic gate are presented. Measures of the power consumption, propagation delay and output voltage swing are used as fitness functions, since the problem is treated as a multi-objective optimization task.
  BibTeX:
  @inproceedings{OPT05,
  author = {Roberto Pereira-Arroyo and Pablo Alvarado-Moya and Wolfgang H. Krautschneider},
  title = {{A}pplication of multi-objective optimization with a genetic algorithm for the optimization of {C}{M}{L} {C}ircuits},
  year = {2005},
  month = {11},
  booktitle = {ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  pages = {263-267} }
  [Abstract] [BibTeX]
  
  
• P. Vega-Castillo, W.H. Krautschneider
  Low voltage, low power, self-clocked memory read/program-verify circuitry with adjustable operating frequency
  In Tagungsband "ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 303-306
  Veldhoven, The Netherlands
  Abstract:
  A memory reading and program-verify circuitry for low voltage, low power applications is presented, which performs the read, program and verify operations for a single-poly nonvolatile memory. The reading circuitry performs single-ended sensing, thus no dummy cells are required. The circuit was fabricated using 0.35μm technology with a nominal supply voltage of 3.3V. Power consumption during reading was measured to be 4.7μW with a supply voltage of 0.75V at an operating frequency of 714 Hz.
  BibTeX:
  @inproceedings{Vega-ProRisc-05,
  author = {P. Vega-Castillo and W.H. Krautschneider},
  title = {{L}ow voltage, low power, self-clocked memory read/program-verify circuitry with adjustable operating frequency},
  year = {2005},
  month = {11},
  booktitle = {ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {Veldhoven, The Netherlands},
  pages = {303-306} }
  [Abstract] [BibTeX]
  
  
• Carsten Bronskowski, Philipp Meier auf der Heide, Dietmar Schroeder
  Optimisation of Programmable Operational Amplifiers
  In Tagungsband "ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 196-200
  ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005
  Abstract:
  An optimisation of a programmable Operational Amplifier is presented. The OpAmp is programmable concerning noise and power consumption while keeping the stability for the whole range of programmability. Simulation results for a 0.35 um CMOS OpAmp show either low noise of 3.2 nV/sqrt(Hz) or low power consumption of 84 uW having a phase margin variation of only Delta_Phi_res = 3°.
  BibTeX:
  @inproceedings{Optimisation_OP,
  author = {Carsten Bronskowski and Philipp Meier auf der Heide and Dietmar Schroeder},
  title = {{O}ptimisation of {P}rogrammable {O}perational {A}mplifiers},
  year = {2005},
  month = {11},
  booktitle = {ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  pages = {196-200} }
  [Abstract] [BibTeX]
  
  
• Kristian Hafkemeyer, Alexander Mora-Sanchez, Dietmar Schroeder
  Predictive analogue-to-digital converter for low-power electrocardiographic applications
  In Tagungsband "ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 205-208
  ProRisc Veldhoven 17.-18. November 2005
  Abstract:
  Abstract—A predictive A/D-converter for the acquisition and digitisation of electrocardiographic (ECG) signals is presented. The proposed converter is intended to be utilised in low-power ECG applications.
  BibTeX:
  @inproceedings{PRED05,
  author = {Kristian Hafkemeyer and Alexander Mora-Sanchez and Dietmar Schroeder},
  title = {{P}redictive analogue-to-digital converter for low-power electrocardiographic applications},
  year = {2005},
  month = {11},
  booktitle = {ProRISC2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {ProRisc Veldhoven 17.-18. November 2005},
  pages = {205-208} }
  [Abstract] [BibTeX]
  
  
• Alexander Mora-Sanchez, Dietmar Schroeder, Wolfgang H. Krautschneider
  Sigma-Delta Modulators of 2nd- and 3rd-Order with a Single Operational Transconductance Amplifier for Low-Power Analogue-to-Digital Conversion
  In Tagungsband "ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 259-262
  ProRisc Veldhoven (The Netherlands) 17.-18. November 2005
  Abstract:
  The use of a single amplifier to realise switchedcapacitor (SC) based 1-bit low-pass sigma-delta modulators is presented. Sampling and integration operations are executed concurrently whereas the single amplifier is time-shared. It is shown that this method offers less power consumption than the traditional counterpart for modulation orders less than 4.
  BibTeX:
  @inproceedings{Mora:SDmod:2005,
  author = {Alexander Mora-Sanchez and Dietmar Schroeder and Wolfgang H. Krautschneider},
  title = {{S}igma-{D}elta {M}odulators of 2nd- and 3rd-{O}rder with a {S}ingle {O}perational {T}ransconductance {A}mplifier for {L}ow-{P}ower {A}nalogue-to-{D}igital {C}onversion},
  year = {2005},
  month = {11},
  booktitle = {ProRisc2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {ProRisc Veldhoven (The Netherlands) 17.-18. November 2005},
  pages = {259-262} }
  [Abstract] [BibTeX]
  
  
• Jakob M. Tomasik, Carsten Bronskowski, Wolfgang H. Krautschneider
  A Model for Switched Biasing MOSFET 1/f Noise Reduction
  In Tagungsband "SAFE2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005", 2005, p. 60-63
  SAFE2005, Veldhofen
  Abstract:
  In this paper, we present a MOSFET 1/f noise model for circuit simulation that incorporates the effect of switched biasing. In contrast to existing models like the 1/f noise Spice model, the simulation is time transient, allowing to predict the reduction of 1/f noise due to switched biasing. In addition, we investigate the benefit of switching a low-noise CMOS op-amp and could achieve a 1/f noise reduction of 40%. This approach differs from conventional techniques like chopping, as the 1/f noise is reduced on the device level.
  BibTeX:
  @inproceedings{1/f05,
  author = {Jakob M. Tomasik and Carsten Bronskowski and Wolfgang H. Krautschneider},
  title = {{A} {M}odel for {S}witched {B}iasing {M}{O}{S}{F}{E}{T} 1/f {N}oise {R}eduction},
  year = {2005},
  month = {11},
  booktitle = {SAFE2005 Workshop, Veldhoven (The Netherlands), 17.-18. November 2005},
  note = {SAFE2005, Veldhofen},
  pages = {60-63} }
  [Abstract] [BibTeX]
  
  
• Carsten Bronskowski, Dietmar Schroeder
  Design of Programmable Operational Amplifiers
  In Tagungsband "IEEJ International Analog VLSI Workshop", Verlag IXL Laboratory Bordeaux, France, 2005
  Bordeaux, 19th-21th October, 2005
  Abstract:
  A methodology for the systematic design of a programmable operational amplifier (OpAmp) is described. The OpAmp is programmable concerning noise and power consumption while keeping the stability for the whole operation range. Experimental results for a 0.35 um CMOS OpAmp show either ultra low noise of 2 nV/sqrt(Hz) or low power consumption of 140 uW.
  BibTeX:
  @inproceedings{Bronskowski:OPDesign:2005,
  author = {Carsten Bronskowski and Dietmar Schroeder},
  title = {{D}esign of {P}rogrammable {O}perational {A}mplifiers},
  year = {2005},
  month = {10},
  booktitle = {IEEJ International Analog VLSI Workshop},
  note = {Bordeaux, 19th-21th October, 2005},
  publisher = {IXL Laboratory Bordeaux, France} }
  [Abstract] [BibTeX]
  
  
• A. Weber, A. Birner, W. Krautschneider
  Data Retention Analysis in Individual Cells
  In Tagungsband "ESSDERC", 2005
  Grenoble
  Abstract:
  In DRAM every memory cell experiences an individual mixture of leakage currents which consume part of the stored charge and lead to a wide distribution of data retention time (tRet). This distribution consists of an intrinsic (main) and an extrinsic (tail) branch. The formalism of activation energies (Ea) provides information about the mechanisms involved. Activation energies of single cells in a 256M DDR memory chip and their dependence on negative gate bias (VNWLL) as well as body bias (VBB) have been investigated intensively for the first time. The worst tail cells – all within a small retention time interval – show a twofold and wide distribution of activation energies. The lower Ea distribution can be altered with VNWLL, whereas the higher Ea distribution only alters with VBB. Going from tail towards main distribution, the percentage of cells belonging to the low Ea part continuously decreases and finally disappears. We therefore conclude that a gate induced mechanism (GIDL) is the main component responsible for DRAM retention tail.
  BibTeX:
  @inproceedings{Weber05,
  author = {A. Weber and A. Birner and W. Krautschneider},
  title = {{D}ata {R}etention {A}nalysis in {I}ndividual {C}ells},
  year = {2005},
  month = {09},
  booktitle = {ESSDERC},
  note = {Grenoble} }
  [Abstract] [BibTeX]
  
  
• Dietmar Schroeder
  Adaptive low-power analog/digital converters for wireless sensor networks
  In Tagungsband "3rd Int. Workshop on Intelligent Solutions in Embedded Systems (WISES'05)", 2005, p. 70--78
  Hamburg, 20 May 2005
  Abstract:
  The paper addresses the problem of power consumption of sensor nodes in a wireless network. An integrated low-power analog/digital converter (ADC) is presented that is particularly suited for wireless sensor applications. The converter makes use of information theoretic redundancy in the input signal for reducing the conversion workload and performing data compression on-the-fly during conversion (entropy-coding A/D converter). Thus, energy is saved both in signal conversion and transmission. Experimental results from a prototype chip are presented. The converter is especially suitable for sensor networks that maintain a global data model. This is further illustrated on an exemplary scenario of distributed wave detection. It is shown that sensor signal detection and acquisition in this type of applications can be carried out very efficiently with entropy-coding con-verters used in the sensor nodes.
  BibTeX:
  @inproceedings{Schroeder:WISES:2005,
  author = {Dietmar Schroeder},
  title = {{A}daptive low-power analog/digital converters for wireless sensor networks},
  year = {2005},
  month = {05},
  booktitle = {3rd Int. Workshop on Intelligent Solutions in Embedded Systems (WISES'05)},
  note = {Hamburg, 20 May 2005},
  pages = {70--78} }
  [Abstract] [BibTeX]
  
  
• P. Vega-Castillo, W.H. Krautschneider
  Single Poly PMOS-based CMOS-compatible low voltage OTP
  In Tagungsband "SPIE Conference "Microtechnologies for the new millenium"", 2005, p. p. 953-960
  Sevilla, Spain, 9-11 May 2005
  Abstract:
  A PMOS-based non-volatile memory cell fully compatible with standard CMOS fabrication processes is presented. It consists of a PMOS access transistor in series with a PMOS transistor whose gate is left floating. The cell configuration eliminates the requirement of a control gate, and therefore can be fabricated without using double poly gates. The cell saves area compared to other single poly non-volatile memory cells based on CMOS approaches, which require both NMOS and PMOS transistors. It also avoids the risk of latch-up. The cells were fabricated using a 350nm standard CMOS process. The programming mechanism of the cell is hot electron injection. The programming operation can be performed at programming voltages as low as |Vds|=4.5V. The cell can be used as a low voltage OTP and provides a very cheap alternative to integrate OTPs in CMOS ICs without any modification of the fabrication process.
  BibTeX:
  @inproceedings{PaolaSPIE05,
  author = {P. Vega-Castillo and W.H. Krautschneider},
  title = {{S}ingle {P}oly {P}{M}{O}{S}-based {C}{M}{O}{S}-compatible low voltage {O}{T}{P}},
  year = {2005},
  month = {05},
  booktitle = {SPIE Conference "Microtechnologies for the new millenium"},
  note = {Sevilla, Spain, 9-11 May 2005},
  pages = {p. 953-960} }
  [Abstract] [BibTeX]
  
  
• Carsten Bronskowski, Dietmar Schröder
  Systematischer Entwurf von einstellbaren Operationsverstärkern
  In Tagungsband "ANALOG 2005", Verlag VDE Verlag, 2005, vol. 46, Serie "GMM Fachbericht", p. 115--120
  8. GMM/ITG-Diskussionssitzung, Hannover, 16.-18. März 2005
  Abstract:
  Im vorliegenden Beitrag wird ein Konzept zum systematischen Entwurf eines einstellbaren Operationsverstärkers anhand von frei wählbaren Schaltungsparametern vorgestellt. Hierdurch wird eine über einen Steuerstrom variable Einstellung des OPs bezüglich seines Rauschens und seiner Stromaufnahme mit konstant bleibender Phasenreserve erreicht. Unter Zuhilfenahme der Übertragungsfunktion des Operationsverstärkers wird ein theoretischer Ansatz zur Bestimmung der Freiheitsgrade entwickelt, welcher eine Phasenreserve von 70° für den gesamten Einstellbereich garantiert. Anhand einer Realisierung in einer 0,35 um CMOS Technologie wird die Einstellbarkeit des verwendeten OPs nachgewiesen.
  BibTeX:
  @inproceedings{Bronskowski:Entwurf:2005,
  author = {Carsten Bronskowski and Dietmar Schr{\"o}der},
  title = {{S}ystematischer {E}ntwurf von einstellbaren {O}perationsverst{\"a}rkern},
  year = {2005},
  month = {03},
  booktitle = {ANALOG 2005},
  note = {8. GMM/ITG-Diskussionssitzung, Hannover, 16.-18. M{\"a}rz 2005},
  pages = {115--120},
  publisher = {VDE Verlag},
  series = {GMM Fachbericht},
  volume = {46} }
  [Abstract] [BibTeX]
  
  
• Alexander Mora-Sanchez, Dietmar Schroeder
  Low-power decimation filter in a 0.35um technology for a multi-channel biomedical data acquisition chip
  In Tagungsband "Proceedings of the XI IBERCHIP Workshop", 2005, p. 199-202
  Salvador da Bahia, Brasilien, 28-30 March 2005
  Abstract:
  The implementation of a low-power decimation filter for a multi-channel biomedical data acquisition chip, intended to be battery powered, is reported. The proposed filter has been designed using a 0.35 μm CMOS technology. It is based on the polyphase decomposition of a 3rd-order comb filter with decimation factor of 256 and will replace the IIR-FIR comb filter structure that has been used so far. A simple model for the estimation of power dissipation predicts a power consumption of the proposed filter of about 70%-80% less than that of the IIR-FIR comb filter. Actual measurements on a test chip registered a power consumption of 127 μW at 10 MHz clock frequency, which is in agreement with the predicted values. This paper also reports a variation of the proposed filter that processes 4 signals (multi-signal approach) by sharing computational resources while keeping the low-power feature, thus, saving about 30% of gate area compared to using 4 replicas of a single-signal filter.
  BibTeX:
  @inproceedings{Mora:Decimator-LP:2005,
  author = {Alexander Mora-Sanchez and Dietmar Schroeder},
  title = {{L}ow-power decimation filter in a 0.35um technology for a multi-channel biomedical data acquisition chip},
  year = {2005},
  month = {03},
  booktitle = {Proceedings of the XI IBERCHIP Workshop},
  note = {Salvador da Bahia, Brasilien, 28-30 March 2005},
  pages = {199-202} }
  [Abstract] [BibTeX]
  
  
• A. Avellan, E. Miranda, D. Schroeder, W. Krautschneider
  Model for the voltage and temperature dependence of the soft-breakdown current in ultrathin gate oxides
  Artikel in "Journal of Applied Physics", vol. 97, p. 14104, 2005
  Abstract:
  The voltage and temperature dependence of the soft breakdown conduction mechanism in metal-oxide-semiconductor capacitors and transistors with ultrathin dielectric layers is investigated. A physical derivation of the quantum point contact model and its parameters is presented, which incorporates the smearing of the Fermi function at the electrodes as well as the effect of thermal vibrations of the constriction’s bottleneck. The model also takes into account the boundary conditions at the two ends of the breakdown path by considering the semiconductor band bending occurring in the nondamaged surrounding device area. Good agreement between model and experimental curves is found. Because of its analytical nature, the proposed model can be implemented in circuit simulators.
  BibTeX:
  @article{Avellan:SoftBreakdn:2005,
  author = {A. Avellan and E. Miranda and D. Schroeder and W. Krautschneider},
  title = {{M}odel for the voltage and temperature dependence of the soft-breakdown current in ultrathin gate oxides},
  year = {2005},
  month = {01},
  journal = {Journal of Applied Physics},
  pages = {14104},
  volume = {97} }
  [Abstract] [BibTeX]
  
  
• R. Meixner and F.A. Yilidrim and R.R. Schliewe and H. Goebel and W. Bauhofer and W. Krautschneider
  Low-Temperature Process for manufacturing All Polymer Thin-Film Transistors
  In Tagungsband "IEEE Polytronic 2005 Conference", 2005, Herausgeber IEEE
  IEEE Polytrronic 2005
  Abstract:
  We report a low-temperature process to manufacture an all polymer thin-film transistor avoiding curing and annealing temperatures higher than 80°C. This aspect of energy efficiency directly supports the low-cost feature of organic devices in fabrication.
  The process is being demonstrated by using commercially available polymers such as poly(ethylenedioxythiophene)/polystyrenesulfonate dispersion representing the source, drain and gate electrode, Norland optical adhesive NOA 75 as the gate-dielectric and regioregular poly(3w-hexylthiophene-2,5-diyl) as the semiconducting polymer - all on a polyvinyl chloride substrate. Functional devices with a channel length of 25 µm and a channel width of 1 mm to 5 mm have been realized.
  BibTeX:
  @inproceedings{IEEE:Polymer:2005,
  author = {R. Meixner and F.A. Yilidrim and R.R. Schliewe and H. Goebel and W. Bauhofer and W. Krautschneider},
  title = {{L}ow-{T}emperature {P}rocess for manufacturing {A}ll {P}olymer {T}hin-{F}ilm {T}ransistors},
  year = {2005},
  booktitle = {IEEE Polytronic 2005 Conference},
  editor = {IEEE},
  note = {IEEE Polytrronic 2005} }
  [Abstract] [BibTeX]
  
  

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